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Series 1 FPGA Boards are deprecated. Please switch to Series 2.

The old product page is still available here for documentation purposes.

Table of Contents Features Functional description     External power: CON1 and CON8     JTAG connector: CON7, JP3 and JP4     I/O voltages: JP1     Experimental Board I/O Connector Compatibility notes Images Additional resources Schematics (PDF) Eagle Library of the I/O connectors

Features

• Baseboard for USB-FPGA Modules 1.2 and 1.11. (For USB-FPGA Modules 1.15 the Experimental Board 1.3 is recommended.)
• High-efficiency switching regulators to generate the supply voltages
  • 1.2 V @ 2.7 A
  • 2.6 V @ 2.5 A
  • 3.3 V @ 2.5 A
  • Wide input range: 4.5 to 16 V
• I/O voltages VCCO_IO(=VCCO_RIGHT) and VCCO_TOP can be easily and independently set to 3.3V, 2.6V, 1.2V or to an external voltage. (On Spartan 6 USB-FPGA Module 1.11 VCCO_TOP has no function. The I/O voltage of the pins at rows C,D and F of the I/O Connector is 3.3V.)
• All I/O Ports available on a standard 2.54 mm (0.1 inch) grid via four 1x23 pin and two 1x16 pin connectors to which Expansion Boards or Breadboards can be connected
• Downward pin compatible to Experimental Board 1.1
• JTAG interface for the FPGA

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Functional description

The following drawing shows the measurements and the location of the of the described elements.

Click on the image for a larger version or download the PDF version.

External power: CON1 and CON8

Alternatively CON8 can be used to connect non standard power cables. The ground pin of CON8 (quadratic pad) is marked with "B" and the supply pin (oval pad) is marked with "R", see the images below.

It is also possible to supply the external voltage via the Vin Pin of the Experimental Board I/O Connector described below.

If non-stabilized power supplies are used it must be made sure that the peak voltage is not larger then 18V.

Hints for power supply via USB can be found on the ZTEX Wiki.

JTAG connector: CON7, JP3 and JP4

The voltage for the I/O signals (TCK,TMS,TDI,TDO) is 2.6V. Pin 2 can be used as supply for these signals. Pin 1 (+3.3V) can be used as supply for the JTAG adapter.

On USB-FPGA Modules 1.2 jumpers JP3 and JP4 can be closed to enforce JTAG configuration mode. But usually this is not required since the JTAG interface is always enabled. On USB-FPGA Modules 1.11 these jumpers have no function.

An appropriate connector set for CON7 is delivered with the Experimental Board.

I/O voltages: JP1

By closing this jumpers (see images below) the I/O voltages can be switched easily to 3.3V, 2.6V or 1.2V. If other I/O voltages are required the jumpers must be left open and the I/O voltage must be supplied via th VIO or VT pins of the Experimental Board I/O Connector, respectively.

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Experimental Board I/O Connector

Four 1x23 pin connectors (rows A and B) and two 1x16 PIN (rows C and D) connectors deliver I/O signals and voltages to user circuits. The four 1x23 pin connectors are downward pin compatible with Experimental Board 1.1. The two 1x16 pin connectors contain the additional I/O's introduced with the Spartan 6 USB-FPGA Module 1.11 and the serial interface of the EZ-USB FX2.

The drawing shows the position of the connectors.

The Pinlist and the List of Connections are can be downloaded in Gnumeric or Excel format. The following table is is a short version the these files:

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PMOD connectors

• A26 - A31
• A43 - A38
• B43 - B38
• B26 - B31
• B16 - B11

Compatibility notes

Users switching from Experimental Board 1.1 have to consider the following differences:

1. The Experimental Board 1.2 does not contain serial drivers anymore. The serial port signals form the EZ-USB FX2 are now available on pins C2 to C5 of the Experimental Board I/O Connector
2. Functions of pins A20 and A30 have been swapped. (Users of USB-FPGA Modules 1.2 have to swap pins 95 and 84 of the FPGA in the ucf file. Users of Spartan 6 USB-FPGA Modules 1.11 have to swap pins F7 and A12 of the FPGA in the ucf file.)

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Images

Click on the images for larger versions.

Development Board / Experimental Board 1.2.

Experimental Board with Spartan 6 USB-FPGA Module 1.11 and two Expansion Boards. The depicted set consists in: 1 × Spartan 6 USB-FPGA Module 1.11 (with pin headers) 1 × Experimental Board 1.2 2 × Expansion Board 4 × 1x23 pin female pin header 4 × 1x23 pin male pin header

Experimental Board with Spartan 6 USB-FPGA Module 1.11 and two Breadboards. The depicted set consists in: 1 × Spartan 6 USB-FPGA Module 1.11 (with pin headers) 1 × Experimental Board 1.2 2 × Breadboard 4 × 1x23 pin male pin header