ZTEX

 
Products
Series 2 FPGA Boards
  USB-FPGA Module 2.16
  USB-FPGA Module 2.14
  USB-FPGA Module 2.13
  USB-FPGA Module 2.04
  USB-FPGA Module 2.01
  FPGA Module 2.00
  Debug Board
  Series 1 Adapter
  Cluster Board
  FX3 port status
Obsolete products
  Series 1 FPGA Boards
To the ZTEX Shop ZTEX Shop
 SDK and Examples 
  Overview
  Default Firmware
  Documentation
  Downloads
  Example
  Release history
  ZTEX Wiki
 
OS Discount Program
 
Downloads
 
Contact
Impressum
Terms and Conditions
RoHS
 

Twitter
    Home / Products         SDK    
    To the ZTEX Shop Shop   
    Wiki / Forums         Downloads    
    deutsch     englisch    

Series 2 FPGA Boards

ZTEX USB-FPGA Modules 2.∗ are a series of FPGA Boards with USB controller and a compatible external I/O connector. This page describes the common features and gives a summary about the FPGA Boards and accessories.

Table of Contents

FPGA Boards - product overview
Accessories
Common Features
SDK, Examples, getting started
Description of common functions
    Firmware loading
    FPGA configuration
    Firmware and Bitstream upload options
    External I/O Connector
    Pin assignment and description
Compatibility
Numbering scheme

TOC

FPGA Boards - product overview

USB-FPGA Module 2.16

  • FPGA Board with Xilinx Artix 7 XC7A200T
  • High-Speed USB 2.0 interface
  • Cypress CY7C68013A EZ-USB FX2 Microcontroller
  • 100 General Purpose I/O's (GPIO)
  • 128 MBit Flash memory (e.g. for Bitstream)
  • 128 KBit EEPROM (e.g. for Firmware)
  • Memory mapped I/O between EZ-USB FX2 and FPGA

USB-FPGA Module 2.14

  • FPGA Board in 5 variants with Xilinx Artix 7 FPGA: XC7A15T, XC7A35T, XC7A50T, XC7A75T and XC7A100T
  • Super-Speed USB 3.0 interface
  • Cypress CYUSB3033 EZ-USB FX3S Microcontroller with ARM926EJ core
  • 100 General Purpose I/O's (GPIO)
  • 256 MByte DDR3 SDRAM
  • 128 MBit Flash memory (e.g. for Firmware and Bitstream)

USB-FPGA Module 2.13

  • FPGA Board in 4 variants with Xilinx Artix 7 FPGA: XC7A35T, XC7A50T, XC7A75T and XC7A100T
  • High-Speed USB 2.0 interface
  • Cypress CY7C68013A EZ-USB FX2 Microcontroller
  • 100 General Purpose I/O's (GPIO)
  • 256 MByte DDR3 SDRAM
  • 128 MBit Flash memory (e.g. for Bitstream)
  • 128 KBit EEPROM (e.g. for Firmware)

USB-FPGA Module 2.04

  • FPGA Board with Xilinx Spartan 6 XC6SLX16
  • High-Speed USB 2.0 interface
  • Cypress CY7C68013A EZ-USB FX2 Microcontroller
  • 94 General Purpose I/O's (GPIO)
  • 64 MByte DDR SDRAM
  • 128 MBit Flash memory (e.g. for Bitstream)
  • 128 KBit EEPROM (e.g. for Firmware)

USB-FPGA Module 2.01

  • FPGA Board with Xilinx Spartan 6 XC6SLX16
  • High-Speed USB 2.0 interface
  • Cypress CY7C68013A EZ-USB FX2 Microcontroller
  • 100 General Purpose I/O's (GPIO)
  • 128 MBit Flash memory (e.g. for Bitstream)
  • 128 KBit EEPROM (e.g. for Firmware)

FPGA Module 2.00

  • FPGA Board with Xilinx Spartan 6 XC6SLX16
  • 100 General Purpose I/O's (GPIO)
  • Dual 16 MBit Flash memory (Bitstream source selectable by Jumper)
  • On-Board JTAG and SPI header

Accessories

Debug Board for ZTEX Series 2 FPGA Boards

Debug Board

An add-on card with many LED's, switches and a JTAG header. It is intended to simplify debugging and prototyping and is available in two variants:
  • The variant with stackable pin headers can be plugged between an application circuit and FPGA Board.
  • The variant with prototyping area can be used alone or in combination with other prototyping cards.
Series 1 Adapter for FPGA Boards of the Series 2

Series 1 Adapter

An adapter board which allows to use Series 2 FPGA Boards on application circuits for USB-FPGA Modules 1.∗. It also can be used as mounting adapter, if no application circuit is present.
Cluster base board for up to 4 FPGA Boards

Cluster Base Board

Connects up to 4 FPGA Boards of the Series 2 to a small cluster node.
FPGA Board Series 2 accessories

More Accessories can be found in the ZTEX shop

Common Features

  • External I/O connector providing:
    • Up to 100 General Purpose I/O's (GPIO) connected to FPGA
    • JTAG signals
    • Reset signal
    • External power input
    • 3.3V output
    • I/O voltage output or input
  • On-board power supply
  • On-board Flash to store Bitstream
  • On-board EEPROM or Flash to store Firmware
  • On-board MAC-EEPROM: contains a unique non erasable MAC-address and is used to store firmware settings
  • Support of SD cards as secondary Flash, see ZTEX Wiki
  • SDK which covers both, the FPGA Board and the host PC

SDK, Examples, Getting Started

All ZTEX USB-FPGA Modules are supported by the ZTEX SDK. It is developed for EZ-USB FX2 and FX3 Microcontrollers and includes Firmware Kits, a host software API, utilities and many examples.

A Default Firmware with flexible communication interface makes Firmware development obsolete for many applications and allows board-independent host software.

Additional documentation including Tutorials can be found on the ZTEX Wiki

In frame of the the FX3 port the SDK is currently (begin of 2016) reorganized. Development roadmap can be found on the FX3 Port page.

Description of common functions

Functions that are common for all members of the FPGA Board Series 2 are described here.

Firmware loading

The EZ-USB can load firmware from two sources,
  1. from USB and
  2. from non-volatile memory (FX2: EEPROM, FX3: Flash).
At start-up the EZ-USB searches for firmware in non-volatile memory. If a valid firmware image is found the USB controller boots from it. Otherwise a internal firmware is loaded and the EZ-USB waits for being reprogrammed via USB.

All Series 2 FPGA Boards have the jumper JP1 which can be used to disable firmware loading from non-volatile memory. This is especially useful if a corrupt firmware has been installed. Refer to the FPGA Board specific documentation for details.

ZTEX Series 2 FPGA Boards are delivered with a factory-installed default firmware which can be overwritten by user defined firmware using, see Firmware and Bitstream upload options

FPGA configuration

There are three ways to configure the FPGA:
  1. Via USB using the SDK
  2. Via JTAG using Xilinx Tools (May be slow. Therefore the USB method should be preferred)
  3. From Flash using the SDK

If a Bitstream is stored in Flash the firmware automatically tries load it to the FPGA during start-up.

All Series 2 FPGA Boards have a LED which indicates the configuration state of the FPGA. Refer to the FPGA Board specific documentation for details.

Firmware and Bitstream upload options

The SDK offers several ways to upload firmware and Bitstream directly to EZ-USB and FPGA, respectively, and to non-volatile boot memory:
  1. API:
  2. Command line utility FWLoader
  3. Server based (G)UI DeviceServer

External I/O connector

The external I/O connector is located at the bottom sid and consists in two female 2x32 pin headers with 2.54mm grid.
Drawing with measurements of external I/O connector of FPGA Board Series 2

Drawing with measurements of external I/O connector of FPGA Board Series 2. (Click on the image for a PDF version.)

Eternal I/O connector on bottom side of ZTEX FPGA Board with Artix 7 XC7A200T

External I/O connector on bottom side of USB-FPGA Module 2.16. (Click on the image for a larger version)

Pin assignment and description

The pin assignment and description can also be downloaded in Gnumeric or Excel format (several sheets). These tables also contains the product specific details like connection lists (net lists) and I/O voltage ranges.

An Eagle library is available too.

A B C D
1 VIN VIN USB+5V Reset
2 GND GND GND GND
3 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
4 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
5 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
6 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
7 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
8 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
9 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
10 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
11 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
12 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
13 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
14 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
15 3.3V 3.3V FPGA_IO FPGA_IO
16 GND GND VCCO_CD VCCO_CD
17 VCCO_AB VCCO_AB GND GND
18 FPGA_IO FPGA_IO 3.3V 3.3V
19 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
20 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
21 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
22 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
23 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
24 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
25 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
26 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
27 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
28 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
29 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
30 FPGA_IO FPGA_IO FPGA_IO FPGA_IO
31 JTAG_TDI JTAG_TCLK JTAG_TDO JTAG_TMS
32 JTAG_VIO GND GND GND

FPGA_IO Each FPGA Board has up to 100 General Purpose I/O's (GPIO's) connected to the FPGA (not all FPGA_IO's may be assigned). The I/O voltage is either 3.3V or variable. Details can be found in the Gnumeric table or Excel table and in the product description.
GND Ground pins
3.3V 3.3V output
VCCO_AB
VCCO_CD
I/O voltage output or input for rows A/B and C/D. If I/O voltage is fixed to 3.3V the pin is hard wired to 3.3V. If the I/O voltage is variable the pin is connected through a 0Ω resistor to 3.3V. (The default behaviour is the same for both cases.) By unsoldering this resistor an external I/O voltage can be supplied. Details can be found in the Gnumeric table or Excel table and in the description of the FPGA Boards.
JTAG_∗ JTAG signals. On most FPGA Boards also a standard 14 pin connector can by installed or is already installed.
VIN External input voltage. Voltage range depends on FPGA Board.
USB+5V 5V output from USB. I a few cases this pin can be connected to the VIN pin in order to power the FPGA Board from USB. (In most cases USB specification does not guarantee sufficient current.)
RESET Logical 0 resets the FPGA Board. The pin is pulled up and can be left unconnected.

Compatibility

Although the pin assignment described in the previous section is fixed for all Series 2 FPGA Boards, not all pins and functions are assigned in any case. In order to prevent incompatibilities at migration between FPGA Boards, some rules should be considered:
  • Special IO functions like differential signals and clock pins should be avoided (use internal clock sources instead)
  • Not always all FPGA IO's are assigned. Currently only USB-FPGA Modules 2.04 are affected and probably future FPGA Board will be fully assigned. Nevertheless, FPGA IO's with low numbers should be avoided if possible.
  • Not always IO voltage of all FPGA IO's is variable. Currently only USB-FPGA Modules 2.04 are affected and probably voltage of all FPGA IO's of future FPGA is variable. Nevertheless, if possible, IO voltage of 3.3V should be preferred.
  • Pins most close to the center of the FPGA Board have best signal propagation speeds

Numbering scheme

The numbering scheme for the FPGA Boards is is 2.<n><m>, e.g. 2.16.
2. Series number: Is always 2.
<n> FPGA Generation:
   0: Xilinx Spartan 6 FPGA
   1: Xilinx Artix 7 FPGA
<m> Board number: A larger number usually means a larger FPGA Board is some manner, e.g. larger FPGA (package), more RAM, more powerful USB controller.


[Home]  [Impressum]   
© ZTEX GmbH