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Power Supply Module for USB-FPGA-Modules

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Table of Contents

Features
Functional description
    External power: CON1
    JTAG connector: CON4, JP4, JP5
    I/O voltages: JP2, JP3
Package contents
Images

Additional resources

Schematics (PDF)
Eagle Library of the I/O connector

Power Supply 1.0 for USB-FPGA-Modules

Features

  • Wide input range: 8 to 25 V
  • Delivers all required voltages using high-efficiency step down regulators:
    • 1.2 V @ 1.6 A (3 A peak)
    • 2.5 V @ 1.6 A (3 A peak)
    • 3.3 V @ 1.6 A (3 A peak)
  • I/O voltages VCCO_RIGHT / VCCO_IO and VCCO_TOP can be easily and independently set to 3.3V, 2.5V or to an external voltage. (On Spartan 6 USB-FPGA-Module 1.11 VCCO_TOP has no function. The I/O voltage of the pins at rows C,D and F of the I/O Connector is 3.3V.)
  • JTAG interface for the FPGA

[TOC]

Functional description

The following drawing shows the measurements and the location of the of the described elements.

Technical drawing of the Power Supply Module 1.0
Click on the image for a larger version or download the PDF version.

External power: CON1

Connector CON1 is used to supply an external 8 to 25 V voltage. The ground pin (quadratic pad) is marked by "-" and "B" and the supply pin (oval pad) is marked by "+" and "R", see the images below.

An appropriate power connector set consisting of a male 2 pin header and a female 2 pin connector with cable is delivered together with the Power Supply Module.

I/O voltages: JP2, JP3

The middle pin of jumpers JP2 and JP3 can be used to supply the I/O voltages VCCO_RIGHT / VCCO_IO and VCCO_TOP, respectively, see images below. By closing this jumpers (see images below) the I/O voltages can be switched easily to 3.3V or 2.5V. (On Spartan 6 USB-FPGA-Module 1.11 VCCO_TOP has no function. The I/O voltage of the pins at rows C,D and F of the I/O Connector is 3.3V.)

JTAG connector: CON4, JP4, JP5

The pin description of the JTAG connector CON4 reads as follows:

Pin Description
1 +3.3V
2 +2.5V
3 Not connected
4 TMS
5 TCK
6 TDI
7 TDO
8 GND

The voltage for the I/O signals (TCK,TMS,TDI,TDO) is 2.5V. Pin 2 can be used as supply for these signals. Pin 1 (+3.3V) can be used as supply for the JTAG adapter.

The JTAG mode of the FPGA can be enforced by closing jumpers JP4 and JP5. But usually this is not required, i.e. JTAG configuration works even if these jumpers are open.

An appropriate power connector set for CON4 is delivered with the Power Supply Module.

[TOC]

Package contents

  • JTAG connector set (one 8 pin male 180° header, one 8 pin male 90° header, one 8 pin female connector with cable)
  • Power connector set (one 2 pin male header, one 2 pin female connector with cable)
Accessories delivered with the Power Supply 1.0

[TOC]

Images

Click on the images for larger versions.

Power Supply 1.0 for USB-FPGA Modules Series 1

Top side of the Power Supply Module.

Accessories delivered with the Power Supply 1.0

Accessories delivered with the Power Supply Power Supply Module.

USB-FPGA-Module 1.2 with power Supply 1.0

USB-FPGA-Module 1.2 stacked on a Power Supply Module.
The depicted set consists in:

  • 1 × USB-FPGA-Module 1.2
  • 1 × Power Supply Module
  • 2 × 2x32 pin male pin header
  • 2 × 2x32 pin stackable pin header
All parts are available in the ZTEX Shop.
Spartan 6 USB-FPGA-Module 1.11 with power Supply 1.0

Spartan 6 USB-FPGA-Module 1.11 stacked on a Power Supply Module.
The depicted set consists in:

  • 1 × Spartan 6 USB-FPGA-Module 1.11
  • 1 × Power Supply Module
  • 2 × 2x32 pin male pin header
  • 2 × 2x32 pin stackable pin header
  • 2 × 1x16 pin male pin header
All parts are available in the ZTEX Shop.


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