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Development Board / Experimental Board for Series 1 FPGA Boards

Series 1 FPGA Boards are deprecated. Please switch to Series 2.

The old product page is still available here for documentation purposes.

Table of Contents

Features
Package contents
Functional description
    External power: CON1
    JTAG connector: CON2, JP4, JP5
    I/O voltages: JP_V_T, JP_V_R
    Serial interfaces: TTY0, TTY1
    Extension Board Connector
Images

Additional resources

Schematics (PDF)
Eagle Library of the I/O connectors

Development Board / Experimental Board 1.1 for USB-FPGA Boards

Features

  • Integrated power supply
    • Wide input range: 8 to 25 V
    • Delivers all required voltages using high-efficiency step down regulators:
      • 1.2 V @ 1.6 A (3 A peak)
      • 2.5 V @ 1.6 A (3 A peak)
      • 3.3 V @ 1.6 A (3 A peak)
    • I/O voltages VCCO_RIGHT / VCCO_IO and VCCO_TOP can be easily and independently set to 3.3V, 2.5V, 1.2V or to an external voltage. (On Spartan 6 USB-FPGA Module 1.11 VCCO_TOP has no function. The I/O voltage of the pins at rows C,D and F of the I/O Connector is 3.3V.)
  • All I/O Ports of the rows A, B, C and D of the I/O Connector are available on a standard 2.54 mm (0.1 inch) grid via four 1x23 pin connectors
  • Two serial interfaces with drivers
  • JTAG interface for the FPGA

[TOC]

Package contents

  • JTAG connector set (one 8 pin male 180° header, one 8 pin male 90° header, one 8 pin female connector with cable)
  • Power connector set (one 2 pin male header, one 2 pin female connector with cable)
  • Two 9 pin serial connectors, male
Accessories delivered with the Development Board / Experimental Board

[TOC]

Functional description

The following drawing shows the measurements and the location of the of the described elements.

Technical drawing of the Experimental Board 1.1
Click on the image for a larger version or download the PDF version.

External power: CON1

Connector CON1 may be used to supply an external 8 to 25 V voltage. The ground pin (quadratic pad) is marked by "-" and "B" and the supply pin (oval pad) is marked by "+" and "R", see the images below.

An appropriate power connector set consisting of a male 2 pin header and a female 2 pin connector with cable is delivered together with the Experimental Board.

It is also possible to supply the external voltage via the 5..15V Pin of the Extension Board Connector described below.

JTAG connector: CON2, JP4, JP5

The pin description of the JTAG connector CON2 reads as follows:

Pin Description
1 +3.3V
2 +2.5V
3 Not connected
4 TMS
5 TCK
6 TDI
7 TDO
8 GND

The voltage for the I/O signals (TCK,TMS,TDI,TDO) is 2.5V. Pin 2 can be used as supply for these signals. Pin 1 (+3.3V) can be used as supply for the JTAG adapter.

The JTAG mode of the FPGA can be enforced by closing jumpers JP4 and JP5. But usually this is not required, i.e. JTAG configuration works even if these jumpers are open.

An appropriate power connector set for CON2 is delivered with the Experimental Board.

I/O voltages: JP_V_T, JP_V_R

The V_R pin and the V_T pin (see images below) of jumpers JP_V_T and JP_V_R can be used to supply the I/O voltages VCCO_TOP and VCCO_RIGHT / VCCO_IO, respectively. By closing this jumpers (see images below) the I/O voltages can be switched easily to 3.3V, 2.5V or 1.2V. (On Spartan 6 USB-FPGA Module 1.11 V_T has no function. The I/O voltage of the pins at rows C,D and F of the I/O Connector is 3.3V.)

Serial interfaces: TTY0, TTY1

The serial connectors TTY0 and TTY1 are controlled by the serial ports of the Cypress CY7C68013A/14A EZ-USB FX2-Microcontroller (using a MAX3232CSE driver).

The two male 9 pin serial connectors which are delivered together with the Experimental Board can be soldered directly on the PCB.

[TOC]

Extension Board Connector

Four 1x23 pin connectors deliver I/O signals and voltages to the Extension Boards. Rarely used signals are available on an additional 3 pin connector. The drawing shows the position of the connectors. The following Pinlist and the List of Connections are also available in Gnumeric or Excel format.

Pin Board
Description
Spartan 3
USB-FPGA MODULE 1.2
Spartan 6
USB-FPGA MODULE 1.11
A1 5..15V 5..15V 5..15V
A2 3V3 3.3V 3.3V
A3 GND GND GND
A4 INT4 INT4 INT4
A5 T0 T0 T0
A6 T1 T1 T1
A7 SCL SCL SCL
A8 SDA SDA SDA
A9 GND GND GND
A10 V_R VCCO_RIGHT VCCO_IO
A11 73 73~IO_L01P_3/VRN_3 B14~IO_L65P_SCP3_0
A12 74 74~IO_L01N_3/VRP_3 A14~IO_L65N_SCP2_0
A13 76 76~IO C13~IO_L63P_SCP7_0
A14 77 77~IO_L20P_3 D11~IO_L66P_SCP1_0
A15 78 78~IO_L20N_3 D12~IO_L66N_SCP0_0
A16 79 79~IO_L21P_3 F10~IO_L64P_SCP5_0
A17 80 80~IO_L21N_3 E11~IO_L64N_SCP4_0
A18 82 82~IO_L22P_3 E10~IO_L37P_GCLK13_0
A19 83 83~IO_L22N_3 C10~IO_L37N_GCLK12_0
A20 84 84~IO_L23P_3/VREF_3 A12~IO_L62N_VREF_0
A21 85 85~IO_L23N_3 B12~IO_L62P_0
A22 86 86~IO_L24P_3 C9~IO_L34P_GCLK19_0
A23 87 87~IO_L24N_3 A9~IO_L34N_GCLK18_0
A24 89 89~IO_L40P_3 D8~IO_L38P_0
A25 90 90~IO_L40N_3/VREF_3 C8~IO_L38N_VREF_0
A26 V_R VCCO_RIGHT VCCO_IO
A27 GND GND GND
A28 92 92~IO_L40P_2/VREF_2 C7~IO_L6P_0
A29 93 93~IO_L40N_2 A7~IO_L6N_0
A30 95 95~IO_L24P_2 F7~IO_L5P_0
A31 96 96~IO_L24N_2 E6~IO_L5N_0
A32 97 97~IO_L23P_2 D6~IO_L7P_0
A33 98 98~IO_L23N_2/VREF_2 C6~IO_L7N_0
A34 99 99~IO_L22P_2 B6~IO_L4P_0
A35 100 100~IO_L22N_2 A6~IO_L4N_0
A36 102 102~IO_L21P_2 D5~IO_L3P_0
A37 103 103~IO_L21N_2 C5~IO_L3N_0
A38 104 104~IO_L20P_2 B5~IO_L2P_0
A39 105 105~IO_L20N_2 A5~IO_L2N_0
A40 107 107~IO_L01P_2/VRP_2 C4~IO_L1P_HSWAPEN_0
A41 108 108~IO_L01N_2/VRP_2 A4~IO_L1N_VREF_0
A42 GND GND GND
A43 3V3 3.3V 3.3V
A44 V_R VCCO_RIGHT VCCO_IO
A45 2V5 2.5V 2.5V
A46 1V2 1..2V 1..2V
B1 BKPT BKPT BKPT
B2 T2 T2 T2
B3 WU WAKEUP* WAKEUP*
C1 5V 5V 5V
C2 USB5V USB_5V USB_5V
C3 3V3 3.3V 3.3V
C4 GND GND GND
C5 CLK CLKOUT R16~IO_L49N_M1DQ11_1
C6 INT5# INT5# INT5#
C7 5 5~L20P_7 K16~IO_L44N_A2_M1DQ7_1
C8 PE7 PE7 PE7
C9 4 4~IO/VREF_7 L16~IO_L47N_LDC_M1DQ1_1
C10 PR6 PE6 PE6
C11 2 2~IO_L01N_7/VRP_7 M16~IO_L46N_FOE_B_M1DQ3_1
C12 PE5 PE5 PE5
C13 1 1~IO_L01P_7/VRN_7 P16~IO_L48N_M1DQ9_1
C14 PE4 PE4 PE4
C15 GND GND GND
C16 V_T VCCO_TOP
C17 141 141~IO_L01N_0/VRP_0 P15~IO_L48P_HDC_M1DQ8_1
C18 PE3 PE3 PE3
C19 140 140~IO_L01P_0/VRN_0 T15~IO_L50N_M1UDQSN_1
C20 PE2 PE2 PE2
C21 137 137~IO_L27N_0 K15~IO_L44P_A3_M1DQ6_1
C22 PE1 PE1 PE1
C23 135 135~IO_L27P_0 R14~IO_L50P_M1UDQS_1
C24 PE0 PE0 PE0
C25 132 132~IO_L30N_0 M13~IO_L74P_AWAKE_1
C26 V_T VCCO_TOP
C27 GND GND GND
C28 131 131~IO_L30P_0 M12~IO_L2P_CMPCLK_2
C29 130 130~IO_L31N_0 T12~IO_L52N_M1DQ15_1
C30 129 129~IO_L31P_0/VREF_0 R9~IO_L23P_2
C31 128 128~IO_L32N_0/GCLK7 P8~IO_L30P_GCLK1_D13_2
C32 127 127~IO_L32P_0/GCKL6 N9~IO_L14P_D11_2
C33 125 125~IO_L32N_1/GCLK5 M9~IO_L29P_GCLK3_2
C34 124 124~IO_L32P_1/GCLK4 N8~IO_L29N_GCLK2_2
C35 123 123~IO_L31N_1/VREF_1 T7~IO_L32N_GCLK28_2
C36 122 122~IO_L31P_1 P7~IO_L31P_GCLK31_D14_2
C37 119 119~IO_L28N_1 M7~IO_L31N_GCLK30_D15_2
C38 118 118~IO_L28P_1 P6~IO_L47P_2
C39 116 116~IO N6~IO_L64N_D9_2
C40 113 113~IO_L01N_1/VRP_1 P4~IO_L63P_2
C41 112 112~IO_L01P_1/VRN_1 M6~IO_L64P_D8_2
C42 GND GND GND
C43 3V3 3.3V 3.3V
C44 V_T VCCO_TOP
C45 2V5 2.5V 2.5V
C46 1V2 1.2V 1.2V

[TOC]

Images

Click on the images for larger versions.

Development Board / Experimental Board 1.1 for USB-FPGA Boards (top side)

Top side of the Development Board / Experimental Board.

Development Board / Experimental Board 1.1 for USB-FPGA Boards (bottom side)

Bottom side of the Development Board / Experimental Board.

Accessories delivered with the Development Board / Experimental Board

Accessories delivered with the Development Board / Experimental Board.

USB-FPGA Module 1.2 with Experimental Board and two Extension Boards

Experimental Board with USB-FPGA Module 1.2 and two Extension Boards.
The depicted set consists in:

  • 1 × USB-FPGA Module 1.2
  • 1 × Experimental Board
  • 2 × Extension Board
  • 2 × 2x32 pin female pin header
  • 2 × 2x32 pin male pin header
  • 4 × 1x23 pin female pin header
  • 4 × 1x23 pin male pin header
USB-FPGA Module 1.2 with Experimental Board and two Breadboards

Experimental Board with USB-FPGA Module 1.2 and two Breadboards.
The depicted set consists in:

  • 1 × USB-FPGA Module 1.2
  • 1 × Experimental Board
  • 2 × Breadboard
  • 2 × 2x32 pin female pin header
  • 2 × 2x32 pin male pin header
  • 4 × 1x23 pin male pin header
Spartan 6 USB-FPGA Module 1.11 with Experimental Board and two Extension Boards

Experimental Board with Spartan 6 USB-FPGA Module 1.11 and two Extension Boards.
The depicted set consists in:

  • 1 × Spartan 6 USB-FPGA Module 1.11
  • 1 × Experimental Board
  • 2 × Extension Board
  • 2 × 2x32 pin female pin header
  • 2 × 2x32 pin male pin header
  • 4 × 1x23 pin female pin header
  • 4 × 1x23 pin male pin header
Spartan 6 USB-FPGA Module 1.11 with Experimental Board and two Breadboards

Experimental Board with Spartan 6 USB-FPGA Module 1.11 and two Breadboards.
The depicted set consists in:

  • 1 × Spartan 6 USB-FPGA Module 1.11
  • 1 × Experimental Board
  • 2 × Breadboard
  • 2 × 2x32 pin female pin header
  • 2 × 2x32 pin male pin header
  • 4 × 1x23 pin male pin header


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